Thin film deposition is essential to the manufacture of solid state electronic devices. By layering various materials on a wafer in a prescribed pattern ("patterning"), a solid state electronic device is formed. Within the semiconductor device industry there is an ever present trend for more complex multi-layer structures and smaller device dimensions. As a result, patterned wafer costs continue to rise, with some patterned wafers costing as much as $100,000. Because a single poor quality layer can destroy the entire wafer, consistent deposition of high quality material layers is essential.
Commercial scale semiconductor device fabrication takes place within automated systems having multiple chambers. Frequently these chambers idle either between shifts, during changeover from one process configuration to the next, or during equipment repair. During equipment repair not only does the malfunctioning chamber idle, but also upstream and downstream chambers in perfect operating condition idle. Unfortunately many of the deposition materials used in semiconductor device fabrication easily oxidize if they are in the chamber during these idle periods, even at the low oxygen levels present in most high vacuum deposition chambers. When a hot deposition chamber (i.e., a chamber equipped with a heating pedestal for heating a wafer to about 300.degree. C. to 600.degree. C.) idles for as brief a duration as 20 to 30 minutes, the material layers ("films") deposited on the first few wafers following the idle period undesirably exhibit lower reflectance (a manifestation of broad distribution in crystal orientation that can result in early electro-migration failure and/or lithographic patterning difficulty) than do films deposited during normal production (i.e., those periods not following an idle period) and/or exhibit sheet resistance values different from those exhibited by films deposited during normal production. This phenomenon is known as the First Wafer Effect. Thus, following an idle period (i.e., a period sufficient to give rise to the First Wafer Effect) film quality and process reliability deteriorate. Therefore wafers deposited with films that exhibit the First Wafer Effect must be discarded.
Although only certain materials deposited in a hot deposition chamber may result in the First Wafer Effect, the First Wafer Effect poses a costly problem. For example, sputtered aluminum (the most widely used material for forming thin film interconnects in solid state devices) and aluminum alloys readily result in wafers exhibiting the First Wafer Effect.
The problem presented by the First Wafer Effect will be more fully comprehended with reference to the primary aluminum deposition methods employed in VLSI and ULSI circuits. As discussed previously, a constant in the semiconductor device field is the drive for reduced lateral dimensions. In order to reduce the lateral device area of storage capacitors, for example, high aspect ratio (i.e., high depth to width ratio) features (e.g., steps, trenches and vias) have become prevalent. Such features possess large side wall surface areas which allow lateral device dimensions to shrink while maintaining constant capacitor area (and thus a constant capacitance). When depositing a film over a high aspect ratio feature, material tends to deposit near the top surface (i.e. the surface nearest the deposition material source or target) of the feature and to prevent subsequently deposited material from reaching the feature's lower surface causing variations in deposition layer thickness including voids (areas containing no deposition material). Accordingly, in the deposition of thin films, much attention has been directed to formation of continuous conformal layers within high aspect ratio features.
As described in "Aluminum Planarization for Advanced Via Applications," European Semiconductor, February 1996, the preferred technique for achieving conformal aluminum coatings (aluminum planarization) is the sequential deposition of aluminum at low wafer temperatures (cold deposition) followed by the deposition of aluminum at high wafer temperatures (hot deposition). This process is commonly referred to as Cold/Hot Sequential Deposition and may take place in either one or two process chambers.
The layer deposited at low wafer temperatures (cold deposited) is referred to as a seed layer. The seed layer enhances the ability of material deposited at higher wafer temperatures (hot deposited) to flow into surface features. Accordingly, the seed layer must achieve continuous, conformal coverage of surface features in order to prevent thickness variations and void formations during subsequent hot deposition. To achieve continuous conformal coverage of high aspect ratio surface features a collimator or particle screening device such as the collimator described in U.S. Pat. No. 5,527,438 is employed. The particle screening device may be applied to a "long throw deposition chamber" wherein a sufficient distance exists between the source of deposition material ("the source") and the wafer mounting mechanism (or pedestal) so that only particles traveling substantially normal to the wafers top surface reach the wafer; thus resulting in more continuous conformal films as compared to films deposited in standard throw deposition chambers (i.e., chambers that are not configured for long throw deposition). A particle screening device may be placed between the source and the pedestal in order to further enhance continuous conformal coverage. Although long throw deposition results in enhanced coverage, the long throw distance results in a slower deposition rate and therefore reduces system throughput. Thus, the most advantageous configuration for Cold/Hot Sequential Deposition employs two deposition chambers, a first long throw deposition chamber for cold deposition of the seed layer, and a second standard throw deposition chamber for the hot deposition. The first chamber is configured for long throw deposition to facilitate continuous conformal coverage of high aspect ratio surface features. The second chamber is configured for standard throw deposition to facilitate reduction in process time and thus to increase throughput as compared to long throw deposition chambers.
The quality of the deposited film is further enhanced when deposited on a titanium (or titanium alloy) wetting layer. Specifically "Aluminum Planarization for Advanced Via Applications," European Semiconductor, February 1996, teaches that titanium layers deposited at wafer temperatures below 100.degree. C. exhibit a strong (002) crystal orientation and that aluminum films deposited at a 460.degree. C. wafer temperature on (002) titanium films have a strong (111) crystal orientation. The (111) orientation is associated with the strongest aluminum film electro-migration resistance characteristics and is therefore preferred.
A more detailed description of the Cold/Hot Sequential Deposition is provided in U.S. Pat. No. 4,994,162 ("the '162 Patent"). The '162 Patent acknowledges the enigma the First Wafer Effect presents, stating "[t]he deposition is optimally continuous and uninterrupted throughout all three steps, in order to prevent the formation of unwanted oxide layers that would otherwise occur during discontinuities in the process." These unwanted oxide layers are believed to cause the First Wafer Effect.
Despite wide recognition of the First Wafer Effect within the semiconductor community, a solution consistent with the high productivity requirements of commercial fabrication systems does not exist. In fact, prior to the present invention the only method for dealing with the First Wafer Effect has been to run a number of non-patterned "dummy wafers" (often as many as fifteen) through a hot deposition chamber which has idled. Not only does this reduce the productivity of the system and increase wafer costs, it also fails to address the substantial cost associated with the destruction of patterned wafers which idle within deposition chambers. Thus, a recognized need exists within the semiconductor fabrication field for a process that will eliminate the First Wafer Effect. Such a process must be cost effective and must be able to be quickly performed using existing equipment and materials.
Accordingly, it is an object of the present invention to provide a method and apparatus that eliminates the First Wafer Effect and that allows patterned wafers which idle within a fabrication system to be salvaged.
It is a further object of the invention to reduce the number of wafers that must be discarded due to the First Wafer Effect, and thus to reduce the average cost per wafer.